Output pulse rise time is generally independent of gate input rise time.
But it should be noted that the gate input is sensitive to particular threshold voltages to decide when to begin and end the pulse. If the signal being applied to the gate input is very slow, the pulser may not produce the specified minimum pulse width.
In other words, the output pulse may be wider than the input pulse
if the input has slow rise and fall times.
To avoid confusion, the datasheet specifies the gate rise time -- for example, 20 ns. This specification is easily met by the function generators offered by today's test equipment manufacturers.
A further word about gate inputs: DEI's products have gate input impedances of 50 ohms. This low impedance helps the pulser avoid false triggering due to noise. It also means the function generator must be capable of driving a TTL logic level (+5 V) into a 50 ohm load, which requires the generator to source 100 mA. Again, this specification is met by commercial function generators. But if you are designing a custom logic circuit using a microprocessor, FPGA, etc., to drive the gate input, be sure to include a buffer stage that meets the above requirement. Feel free to contact us for recommendations.